Due to the increase of processing data, processing systems should be designed to occupy less space. The enlargement of the processing systems has caused the growth of the data size, on the other hand, the problems of miniaturization of metal-oxide semiconductor field ef
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Due to the increase of processing data, processing systems should be designed to occupy less space. The enlargement of the processing systems has caused the growth of the data size, on the other hand, the problems of miniaturization of metal-oxide semiconductor field effect transistor MOSFET have faced many problems for the designers of processing circuits, the idea of replacing binary processing circuits with multi-valued level processing circuits. It reduces connections between systems and reduces space consumption. Because the implementation of multi-level processing circuits with MOSFET technology is very complicated and problematic, a suitable alternative for MOSFET is carbon nanotube field effect transistor (CNTFET) technology, which has many advantages such as the possibility of making transistors It has a different threshold voltage, which reduces design challenges in the implementation of multi-level systems. In this article, the structure of the transistor level of single-digit quaternary and multi-digit comparators is presented. Transistor level circuits are presented along with circuit techniques. The simulation results also show that the amount of propagation delay and power consumption in the single-digit quaternary comparator is 17.3 picoseconds and 4.59 microwatts, respectively, and the PDP index of this comparator is 79.2 aJ. All simulation results of proposed comparators in this article have been obtained using carbon nanotube field effect transistors and 32 nm technology in HSPICE software.
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