تحلیل و بررسی تأثیر پارامترهای طراحی فلیپ‌فلاپ استاتیک بر مشخصه‌های زمانی و توان مصرفی آن در تکنولوژی 16 نانومتر
محورهای موضوعی : مهندسی برق و کامپیوتر
احسان محمودی
1
(دانشگاه صنعتی نوشیروانی بابل)
مرتضی قلی پور
2
(دانشگاه صنعتی نوشیروانی بابل)
کلید واژه: پارامترهای زمانیتوان مصرفیفلیپ‌فلاپ استاتیک,
چکیده مقاله :
فلیپ‌فلاپ یکی از عناصر مهم در طراحی مدارهای دیجیتال است که کارایی آن در سرعت و توان مصرفی سیستم بسیار تأثیرگذار می‌باشد. در این مقاله با انجام شبیه‌سازی‌های مناسب، پارامترهای زمانی فلیپ‌فلاپ استاتیک به دست آمده و تأثیر ابعاد ترانزیستورهای مختلف بر این پارامترها مورد بررسی قرار گرفته است. سپس با تغییر ولتاژ تغذیه و پارامترهای فرایند ساخت، میزان تأثیر تغییرات این عوامل بر کارایی فلیپ‌فلاپ مورد ارزیابی قرار گرفته است. عرض ترانزیستورهای مدار بر اساس دستیابی به حاصل‌ضرب انرژی- تأخیر (EDP) و حاصل‌ضرب توان- تأخیر (PDP) مطلوب در دو حالت به صورت مجزا تعیین شده‌اند. سپس تأثیر تغییرات ولتاژ بر افزایش EDP و PDP در مقایسه با فلیپ‌فلاپ پایه مورد بررسی و ارزیابی قرار گرفته است. فلیپ‌فلاپ مورد بررسی در این مقاله فلیپ‌فلاپ استاتیک نوع D می‌باشد. شبیه‌سازی‌ها با استفاده از نرم‌افزار HSPICE در تکنولوژی 16 نانومتر و در فرکانس نامی GHz 1 انجام شده است.
Flip-flop is one of the important elements in the digital circuit’s design, which its performance affects the speed and power of the system. In this paper, appropriate simulations are used to obtain the timing parameters of the static flip-flop and investigate the effect of the width of different transistors on these parameters. Then, the effects of the supply voltage and manufacturing process parameters variation on the performance of the flip-flop are investigated. The widths of transistors are determined based on the desired energy-delay product (EDP) and power-delay product (PDP) for these two cases separately. Then, the effect of voltage variations on the increase of EDP and PDP are investigated compared to the base flip-flop. We used a static D-type flip-flop in our simulations. The simulations were performed using the HSPICE in 16 nm technology node at 1 GHz frequency.
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